RISC-V Assembly · From beginner to advanced
Learn assembly
by running it.
Write assembly, step through execution, inspect registers and memory, and see exactly how each instruction changes the machine.
| x0 | 0x00000000 |
| x1 | 0x00000005 |
| x2 | 0x00000001 |
| x3 | 0x00000000 |
| x4 | 0x00000000 |
| ra | 0x00000000 |
| sp | 0x7FFFFFF8 |
| 0x7FFFFFF8 | 0x00000005 |
| 0x7FFFFFFC | 0x00000001 |
| 0x80000000 | 0x00000000 |
Every tool you need
to master RISC-V.
From first instruction to full understanding — one integrated platform.
Write assembly, step through execution, and inspect every register and memory cell in real time.
Structured lessons that build your mental model of RISC-V from the ground up.
Curated coding challenges with automated test cases. Fix bugs, implement functions, pass the suite.
Hands-on pipeline and architecture labs. Trace hazards, forwarding, and control flow at the hardware level.
Test your knowledge with instant-feedback quizzes covering ISA, calling conventions, and architecture concepts.
Track your learning journey with milestone-based checkpoints across all topics and difficulty levels.
See the architecture,
not just the code.
Follow each instruction through the parts of the machine it touches.
Watch execution move
from fetch to writeback.
Every instruction flows through five stages. See exactly where in the machine your code is at each cycle.
See exactly which register
changed and why.
The full 32-register file lights up on every writeback. Nothing is hidden or abstracted.
Make stack frames and
memory writes visible.
Frame boundaries, saved registers, and the stack pointer are labeled and updated in real time.
Run practice problems without
installing a toolchain.
Structured problems with automated test cases run entirely in your browser via WebAssembly.
| x0 | 0x00000000 | |
| x1 | 0x00000005 | |
| x2 | 0x00000001 | ← changed |
| x3 | 0x00000000 | |
| x4 | 0x00000000 | |
| ra | 0x00000000 | |
| sp | 0x7FFFFFF8 | |
| a0 | 0x00000000 |
Registers update as you step.
Every instruction writes a result. The register file shows you exactly which register changed, what it changed to, and how many cycles the operation took. Nothing is hidden behind an abstraction layer.
Every instruction has a visible effect.
Below every instruction, a pseudo-C translation describes the exact computation — register operands, memory addressing, and control flow included. The machine state is never hidden.
The stack becomes visible.
Frame boundaries, saved registers, and the stack pointer are labeled and updated in real time. Every push, pop, call, and return is explicit and traceable.
Structured from zero
to systems-level.
20 lessons across four phases, each building on the last.
Explore the RV32IM instruction set.
Hover any opcode to see its encoding, effect, and a concrete example.
addi x5, x0, 10
x5 ← x0 + 10
From assembly to execution state,
one step at a time.
No install. No account required. Start stepping through instructions in your browser.